AI Hardware

At Google Cloud Next 2026, Google introduced two eighth-generation TPUs designed in partnership with DeepMind. TPU 8t targets frontier training, with a single superpod scaling to 9,600 chips and two petabytes of shared high-bandwidth memory; Google claims roughly 2.8x better price-performance over the previous generation and near-linear scaling to a million chips via the new Virgo network, JAX, and Pathways. TPU 8i targets latency-sensitive inference for concurrent agent workloads, with a new Boardfly serving topology, 3x more on-chip SRAM, a Collectives Acceleration Engine, and up to 80% better performance-per-dollar over its predecessor. Both chips claim up to twice the performance-per-watt of Ironwood, and native PyTorch support entered preview alongside the launch.Google ↗

Sony AI presented Ace, an autonomous table tennis robot that won three of five matches against elite players under ITTF rules at Sony's Tokyo headquarters. The system pairs custom high-speed robotic hardware with event-based vision sensors — cameras that report pixel changes as they happen rather than at a fixed frame rate — giving it reaction times fast enough to return high-speed, high-spin shots. The work was published in Nature on 22 April 2026.Nature ↗

ASUS announced the UGen300, a USB-stick AI accelerator built around a Hailo processor. It delivers up to 40 TOPS of inference performance at roughly 2.5 watts of power draw, targeting local generative-AI workloads on laptops, mini-PCs, and edge devices. The product slots into a growing category of plug-in accelerators aimed at keeping inference off the cloud and on the user's own hardware.ASUS Press Release ↗

TSMC announced a further $100 billion investment in its Arizona fab complex, on top of $65 billion already committed. The expansion adds fabrication plants, advanced packaging, and a research centre. The first 4nm fab is expected to begin production in early 2025.TSMC Press Release ↗

Elon Musk announced plans for a vertically integrated semiconductor facility in Austin, Texas, targeting 2nm process technology and eventually one million wafer starts per month. The project, budgeted at $20–25 billion, would consolidate chip design, fabrication, memory, packaging, and testing under one roof — aimed at supplying custom AI chips for Tesla vehicles, Optimus robots, and SpaceX systems.Tom's Hardware ↗

A major helium facility shutdown in the Middle East removed roughly 30% of global semiconductor-grade helium from the market, leaving chipmakers including TSMC and Samsung with weeks of reserves. Helium cools silicon wafers during lithography at temperatures no other gas can maintain, and there is no substitute. Spot prices doubled within days of the disruption.Tom's Hardware ↗

Starcloud closed a $170 million Series A at a $1.1 billion valuation to build the first commercial data centres in low-Earth orbit, using SpaceX launches to lift hardware. Space-based compute eliminates terrestrial cooling costs — orbital radiators can reject heat passively into the void, without water or air conditioning — and avoids the land-use and grid-connection delays that are stalling ground-based builds. If viable at scale, it marks the first genuinely new compute-infrastructure category since the hyperscale cloud era began.TechCrunch ↗

OpenAI partnered with Cerebras to deploy 750 megawatts of wafer-scale inference hardware, designed for real-time GPT-5 inference. Cerebras separately revived its IPO plans for mid-2026.Cerebras ↗

NVIDIA bought Groq's inference chip technology and engineering team in its largest acquisition. Groq's engineers joined a new Real-Time Inference division, reflecting the industry shift from training hardware toward inference-optimised systems.NVIDIA ↗

AMD released the Instinct MI355X, claiming four times the performance of its MI300X for AI training and inference. The chip gave cloud providers a credible alternative to NVIDIA and some leverage on pricing.AMD Newsroom ↗

NVIDIA released the GeForce RTX 5090 on 30 January 2025, priced at $1,999 and built on the Blackwell consumer architecture. With 92 billion transistors and 3,352 AI TOPS, it was twice as fast as the RTX 4090 for AI-accelerated workloads. DLSS 4 introduced multi-frame generation, producing up to three AI-rendered frames for every real frame.NVIDIA Newsroom ↗

AI compute pushed electrical grids toward capacity limits. The largest US grid operator projected a six-gigawatt reliability shortfall by 2027. Chip designers responded by making energy efficiency a first-class design goal alongside raw performance.Utility Dive ↗

High-bandwidth memory hit severe shortages, creating bottlenecks even as GPU supply improved. Enterprise customers reported significant deployment delays. The pattern showed that AI hardware supply chains involve far more than GPUs alone — memory, packaging, and cooling all became chokepoints in sequence.AI News ↗

Google researchers published TurboQuant, an algorithm that compresses the KV cache — the memory store holding context during inference — by six times, while speeding up attention computation eightfold. The approach made it practical to run much longer context windows on existing hardware, easing one of the chief bottlenecks driving the memory shortages of 2025.VentureBeat ↗

xAI built the Colossus supercomputer cluster in Memphis, Tennessee in 122 days, assembling 100,000 NVIDIA H100 GPUs. It became operational in September 2024 and is used to train and serve the Grok family of models. The speed of construction — roughly four months for a cluster that would normally take over a year — demonstrated what could be done when power, space, and hardware were treated as an emergency procurement problem.xAI ↗

Microsoft introduced the Copilot+ PC category in May 2024, requiring a minimum 40 TOPS neural processing unit from any manufacturer. The first devices shipped on Qualcomm Snapdragon X Elite, with ARM NPUs handling on-device tasks like live captions, image generation, and semantic search without a cloud call. Intel and AMD followed with their own NPU-equipped chips by year-end, making dedicated AI silicon standard in consumer laptops.Microsoft Blog ↗

Cerebras announced its third-generation Wafer-Scale Engine on TSMC 3nm, packing roughly 4 trillion transistors onto a single wafer-sized die. The company raised $1.1 billion at an $8.1 billion valuation to scale production. It remains the largest chip ever built.Cerebras ↗

The H100 introduced a Transformer Engine built specifically for large language models, with up to 9x faster training over the A100. Demand massively outstripped supply throughout 2023, with individual GPUs trading above $40,000 on secondary markets. This was the chip behind the GPT-4 era.NVIDIA Newsroom ↗

Apple's first custom ARM silicon for Mac included a 16-core Neural Engine running 11 trillion operations per second on TSMC 5nm. It proved that dedicated ML hardware in a consumer device could outperform general-purpose processors in both speed and energy efficiency.Apple Newsroom ↗

The A100 delivered 19.5 teraflops of FP32 performance with multi-instance GPU technology that let one chip run multiple AI jobs simultaneously. It became the standard training hardware for GPT-3, DALL-E, and the first wave of foundation models.NVIDIA Newsroom ↗

Alex Krizhevsky's deep neural network won the ImageNet competition by a wide margin, trained on two NVIDIA GTX 580 consumer graphics cards with 3 GB of memory each. The result proved that GPUs designed for gaming could train neural networks far faster than CPUs — the insight that would eventually redirect NVIDIA's entire business.IEEE Spectrum ↗

NVIDIA's Blackwell architecture hit full-scale production after initial GB200 NVL72 systems shipped to cloud providers in late 2024. The B200 offered roughly 2.5x speed and 25x energy efficiency gains over Hopper for inference work.NVIDIA ↗